My School Exams

computer Arcitecture and organization Mock Exam 8 Mock Exam 8

University of Ilorin

Prepare thoroughly for your Computer Architecture and Organization exam with this comprehensive mock test. Tailored for 500 Level Computer Engineering students at the University of Ilorin, this exam covers essential topics including memory systems, DMA, CPU performance, operating systems, scheduling, pipelining, and virtualization. Test your knowledge and identify areas for improvement to ensure exam success.

2 months ago
43 Questions
0.0(0)
0
Students
0.0 ★
0 Ratings
---
Avg Score
---
Success Rate
65m
Duration

About This Exam

Prepare thoroughly for your Computer Architecture and Organization exam with this comprehensive mock test. Tailored for 500 Level Computer Engineering students at the University of Ilorin, this exam covers essential topics including memory systems, DMA, CPU performance, operating systems, scheduling, pipelining, and virtualization. Test your knowledge and identify areas for improvement to ensure exam success.

Topics Covered

- Computer Memory Organization and Types

Exam Structure

  • Question Formatmcq
  • Total Questions43
  • Estimated Duration65 minutes
  • Difficulty LevelMedium

Learning Objectives

  • Understand semiconductor memory organization and types.

Prerequisites

Basic understanding of computer hardware components, memory systems, CPU operations, and fundamental operating system concepts.

Sample Questions

Get a taste of what to expect in the full exam.

1
MCQQuestion

A program executes NN instructions. The processor has a clock rate of ff Hz. The average number of clock cycles per instruction (CPI) for this program on this processor is CC. Calculate the CPU time required to execute the program.

A

N×Cf\frac{N \times C}{f}

B

f×CN\frac{f \times C}{N}

C

Nf×C\frac{N}{f \times C}

D

fN×C\frac{f}{N \times C}

Answer hidden — Download app to see
2
MCQQuestion

In an operating system, the kernel is the core component that runs at all times. If a hardware interrupt occurs, the control is transferred to an interrupt service routine. What is the role of the interrupt vector in this process?

A

The interrupt vector stores the current state of the CPU, including registers and the program counter.

B

The interrupt vector contains the addresses of all the interrupt service routines.

C

The interrupt vector is responsible for executing the interrupted instruction after the service routine completes.

D

The interrupt vector is used to determine if the interrupt is a hardware or software interrupt.

Answer hidden — Download app to see
3
MCQQuestion

A processor uses a 4-stage pipeline: Fetch, Decode, Execute, and Write-back. If each instruction takes one clock cycle to complete in each stage, and instructions are independent, what is the minimum number of clock cycles required to execute 10 instructions using this pipeline? Assume the pipeline is initially empty and fully utilized after the first instruction enters the execute stage.

A

13

B

10

C

7

D

4

Answer hidden — Download app to see
4
MCQQuestion

Consider a scenario where a system has multiple interrupt sources. The operating system needs to determine which interrupt has occurred to execute the correct service routine. What are the two primary mechanisms the operating system can use to identify the source of an interrupt?

A

Polling and Interrupt Vectoring

B

Interrupt Masking and Interrupt Prioritization

C

Direct Memory Access (DMA) and Programmed I/O (PIO)

D

Kernel Mode and User Mode

Answer hidden — Download app to see
5
MCQQuestion

Consider the following processes with their arrival times and burst times: P1: Arrival Time = 0, Burst Time = 10ms P2: Arrival Time = 2ms, Burst Time = 2ms

If the CPU scheduling algorithm is Shortest Job First (SJF) and it is non-preemptive, calculate the average waiting time. Show your step-by-step calculation, including the Gantt chart.

A

4ms

B

8ms

C

10ms

D

2ms

Answer hidden — Download app to see
6
MCQQuestion

In a tightly-coupled multiprocessor system, what is the primary advantage gained from having processors share access to a common memory, and what is a potential drawback that needs careful management?

A

Advantage: Increased throughput; Drawback: Cache coherency issues

B

Advantage: Reduced power consumption; Drawback: Increased bus traffic

C

Advantage: Simpler programming model; Drawback: Synchronization complexity

D

Advantage: Faster I/O operations; Drawback: Increased latency

Answer hidden — Download app to see
7
MCQQuestion

In the context of operating systems, what is the fundamental difference between a process and a program?

A

A program is an active entity that needs resources to accomplish its task, while a process is a passive entity representing code and data.

B

A program is an active entity that needs resources to accomplish its task, while a process is a passive entity representing code and data.

C

A program is the code and data that can be executed, while a process is an instance of that program in execution, acting as an active entity.

D

A process is a collection of instructions that can be executed sequentially, while a program is a set of threads that can run concurrently.

Answer hidden — Download app to see
8
MCQQuestion

A processor's clock rate is increased by 20%, and its CPI is decreased by approximately 7.24%. How does the CPU execution time for a fixed instruction count change? Assume the initial clock rate is ff and the initial CPI is CC.

A

Decreases by approximately 22.7%

B

Increases by approximately 22.7%

C

Decreases by approximately 10%

D

Increases by approximately 20%

Answer hidden — Download app to see
9
MCQQuestion

Consider a processor with a clock rate of 500500 MHz. If a program requires 10710^7 clock cycles to execute, and the processor uses pipelining such that the effective CPI (Cycles Per Instruction) is 1.51.5, what is the total execution time of the program in seconds? Assume the number of instructions is 10710^7.

A

0.030.03

B

0.020.02

C

0.050.05

D

0.010.01

Answer hidden — Download app to see
10
MCQQuestion

A computer system uses a memory hierarchy. If a piece of data is found in the cache memory, what is the expected access time compared to accessing it directly from main memory (RAM)? Assume the data is not in the cache (a cache miss).

A

Accessing from cache will be significantly slower than accessing from main memory.

B

Accessing from cache will be slightly slower than accessing from main memory.

C

Accessing from cache will be significantly faster than accessing from main memory.

D

Accessing from cache will have approximately the same speed as accessing from main memory.

Answer hidden — Download app to see

Ready to start practicing?

Download Learn to access the full exam, get instant feedback, and see step-by-step solutions for every question.

How to Prepare

Key Preparation Tips

  • Review lecture notes on memory organization, DMA, CPU performance, OS concepts, scheduling, pipelining, and virtualization.

Mistakes to Avoid

  • Misinterpreting the units or scale when calculating performance metrics (e.g., GHz, ns, ms).

Success Criteria

Achieving a high score on this mock exam indicates a strong grasp of Computer Architecture and Organization principles, preparing you effectively for your final examinations. Aim for accuracy and speed in your problem-solving.

AI Lecturer

How LearnAI Helps You Prepare Faster

LearnAI is your personal AI lecturer that understands your study style and helps you master any topic in record time.

60% Prediction Accuracy

Our AI models predict potential exam questions with high accuracy based on past trends.

Personalized Explanations

Get step-by-step explanations for every topic, tailored to your current knowledge level.

LearnAI
Your AI Lecturer
Can you explain the key concepts of this exam?
I've analyzed the syllabus. We'll focus on 4 high-yield areas that appear in 75% of previous papers. Ready to start?
Ask LearnAI anything...